| Office | ESB M-09 |
| Phone | +91-44-2257-4482 |
| Fax | +91-44-2257-4402 |
| ramprasath [AT] ee.iitm.ac.in |
I am an Assistant Professor in the Integrated Circuits and Systems Group of the Department of Electrical Engineering, IIT Madras. I primarily work on Electronic Design Automation (EDA) Algorithms, specifically on automation of Back End of Line (BEOL) flow for custom digital, and analog/mixed-signal (AMS) designs.
I was involved in the development of AMS placer and router in ALIGN, an open-source layout generator. During my stint at Synopsys after PhD, I developed various tools for BEOL automation that are now state-of-the-art and are part of Custom Compiler platform. I have recently started exploring (a) mapping of NP-hard/ complete problems to Ising machines, and (b) use of techniques such as satisfiability modulo theory to solve the layout generation problem.
If you are interested in pursuing an MS/PhD in physical design or in any of the aforesaid problems, you can email me your résumé. Formal admissions for these programs happen twice a year. If you are a researcher/developer in industry interested in solving similar problems, you are welcome to get in touch.