This is an elective offered by me at the Department of Electrical Engineering, IIT Madras. The textbook followed is: VLSI Physical Design: From Graph Partitioning to Timing Closure, A. B. Kahng, J. Lienig, I. L. Markov, and J. Hu. Python notebooks used for tutorials in the class are available at: EE5333_tutorials
This is a PG core/elective that was offered by Prof. Janakiraman at the Department of Electrical Engineering, IIT Madras. I have been handling it for the past couple of years. A variant of the course material covered by him is on YouTube. There is an attached lab portion covered at IITM using opensource tools such as Ngspice, Xschem, Klayout, Yosys, OpenSTA, and OpenLane where the students start with schematic simulation of transistors and eventually design and layout an ALU block such as adder/multiplier using the openly available Skywater 130nm PDK.